May 09, 2001
R. Millan-Gabet

Summary of PICNIC Camera Status
===============================

Basically, it was demonstrated during the engineering run of April
2001 that IOTA PICNIC camera works and is ready for observing use.

Dewar
-----

The PICNIC dewar underwent three cooling/warming cycles during the
run.  In each case the dewar pumped down to 10^-7 Torr, and maintained
this pressure for weeks, as long as the outer can was kept cold. The
hold times of the outer and inner cans are approx. 12 and 24 hours,
respectively.  The detector temperature always stabilized to 84K (the
conversion to temperature from the voltage across the sensing diode is
made using the calibration curve provided by Lake Shore, which may not
exactly apply given differences in the wiring). It is possible however
that the cooling time is significantly longer than for the NICMOS
dewar: after one hour the PICNIC temperature is only 127K, and it
takes a full six hours to reach 84K. These values are to be compared
with 100K and 2 hours respectively for NICMOS. A possible explanation
(is it?) is that due to mechanical difficulties (see below) I could
not use the bottom plate of the cold shield, causing perhaps a
significant additional thermal load.

Software
--------

For debugging purposes, of the electronics and of the FPGA readout, I
wrote C++ codes to read the PICNIC camera using the NI DIO-32F card,
exactly as we do for the NICMOS camera. These programs are located in
the "NICMOS Pentium" PC, in the "picnic" directory. The tests reported
here were all done using these programs, which allow basic readout of
an entire quadrant, or an individual pixel.

Electronics
-----------

There seem to be no problems with the electronics, other than the need
to better match the range of voltage output (from reset to saturation)
to the input range of the ADC, by modifiying (reducing in this case)
the gain of the in-dewar pre-amp. However, the exact output range
depends on the details of the readout clocking, and therefore I chose
to wait until we have the final FPGA readout circuit before I make
this adjustment.

Preliminary Measurements
------------------------

Time series of 128x128 samples (recorded using the quadrant readout
program) reveals that with the input of the ADC grounded the rms of
the 16384 samples is 0.9 digital units (du), and 1.05 with the pre-amp
grounded. Both those numbers indicate that there is indeed nothing
wrong with the electronics.

Quadrant frames taken with the detector open to the warm room show a
reasonable big blob of light, with a lot of signal in the upper left
corner, and decaying towards the edges. At low light levels however
(i.e. with the cold plug in front of the detector), the appearance of
quadrant frames is not always pretty, but the PICNIC uses a completely
different clocking for readout than NICMOS, and we are still learning
the fine points, I hope.

Using the single-pixel readout code, I recorded a lot of data files in
order to (a) characterize the linearity curve of the PICNIC pixels,
(b) measure the read noise and gain (conversion factor between du and
electrons of pixel charge) using the "Poisson statistics" method, and
(3) measure the reduction in noise from multiple averaging
reads. These are work in progress. PRELIMINARY analysis of (b) data
gives: gain=1.3 electron/du, read-noise=9.3 electron/read (compared to
12 electron/read for NICMOS). However, in the variance vs. mean signal
curve, the largest mean flux data points (700 du/sample) fall above
the straight line defined by the lower mean signal points (10 to 500
du/sample), and I would like to understand this effect as part of the
final analysis (perhaps most of it will get fixed if I correct for the
detector non-linearity before constructing the variance curve).

To-Do for June 2001
-------------------

(0) Finalize understanding of how the PICNIC array needs to be clocked
for readout.

(1) This detector seems to have the unpleasant property that it has a
funny response for tens of milliseconds after being reset, just like
the NICMOS. What exactly is doing that? Is there anything in the
electronics we can fix? If not, can we optimize the readout codes to
minimize the effect?

(2) Due to bulkier assembly to accomadate the double filter wheel, the
slot in the bottom section of the cold shield needs to be made wider,
otherwise it cannot be used. Also, the holes in the shield for the
filter wheel shafts need to be enlarged.

(3) Does a cold snout mask need to be manufactured for the classical
or IO beam combiner outputs?

(4) We need to manufacture something to hold filters in their slots in
the filter wheels, unless my current solution using shim cutouts and
0-80 screws is the final one. At the moment we have installed H+ND2, K
and the cold plug. We have on hand but not installed J, and H filters.
Do we need to purchase more (i.e. narrowband, ND)?

(5) Need to make a steel fitting for our dewar vacuum valve, so that
we can return the one currently in use to John Geary.

(6) I will make a nice interface for the temperature sensing & heating
circuit (I know, you've heard that before ...)

(7) Need to attach the stepping motors to the filter wheel shafts, and
make an interface to control the motors from software. A design has
been specified for the motors interface box.